TM 32-5811-025-14&P
CHAPTER 5
FUNCTIONING OF EQUIPMENT
Section I. GENERAL
5-1. Scope.
This chapter provides theory of operation for the RF processor test set at simplified block diagram, detailed block
diagram, and detailed schematic diagram levels. The purpose of this chapter is to explain the circuit operation of this
equipment to organizational and intermediate support maintenance personnel.
5-2. Organization.
In addition to the general section, this chapter contains a functional description section and a detailed theory of
operation section.
Section II. FUNCTIONAL DESCRIPTION
5-3. General.
The RF processor test set contains an ac line filter, power supplies, digital command logic, an RF power divider,
and time delay elements (see figure 5-1). The input 115-V ac, 3-o, 400-Hz line power is received by the filter and routed
to the power supplies. The filter removes any stray RF that might be present on the input ac line. The power supplies
provide dc power for the RF processor test set and for an RF processor under test. The digital command logic receives
dc power from the power supplies and generates TTL-level RF processor command data, under control of the front-
panel-mounted DIAGNOSTIC TEST or VERIFICATION TEST switches. The RF power divider and time-delay elements
receive a signal from an external RF signal generator and provide four RF outputs to the RF processor. The RF
processor under test selects the outputs. Depending upon the particular pair of outputs selected, a time-delay offset of
000, 128, or 255 bits is provided by the RF processor test set.
The RF processor test set uses two modes to test RF processors. The first mode is the verification test mode,
used to verify that the RF processor is within its prescribed operating parameters. The second mode is the diagnostic
test mode, used to set and reset the various switches of the RF processor in order to identify specific faulty assemblies.
5-1
